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NXP Semiconductors /LPC408x_7x /LCD /UPBASE

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Interpret as UPBASE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RESERVED 0LCDUPBASE

Description

Upper Panel Frame Base Address register

Fields

RESERVED

Reserved. Read value is undefined, only zero should be written.
LCDUPBASE

LCD upper panel base address. This is the start address of the upper panel frame data in memory and is doubleword aligned.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data